DSD

 

YEAR: III                Branch: ECE                      SEM: I

SUBJECT NAME: Digital System Design Using HDL

Cognitive levels

L1– Remember, L2-Understanding, L3- Applying / Analyzing 

Question Bank for unit-1

Unit-1

Q.No	Question	Marks	Cognitive level
1	a) Explain Hardware Description Languages, FPGA Boards and Software Tools. b)Define FPGA and Basic structure of  FPGA	(6+4)M	L2,L1
2	a)Explain Transistor as a switch and Obtain Logic Gates from switches. b)What are basic building blocks of Xilinx Artix-7 XC7A35T FPGA?	(7+3)M	L2
3	a)With a neat Layout  diagram, Explain  Xilinx Artix-7 XC7A35T FPGA? b) Describe in detail about the Input output Block.	(6+4)M	L2
4	a)Describe in detail about the Configurable Logic Block ? b) Explain briefly about Interconnect Resources	(8+2)M	L2
5	Describe in detail about the i)Block RAM  ii)DSP Slices  iii)XADC  iv)Clock Management  v)HSSIO transceiver  vi)PCIe.	10M	L2
6	a)What is FPGA-Based Digital System Design Philosophy, and How to Think While Using FPGAs? b)Give the Advantages and Disadvantages of FPGAs?	(5+5)M	L2
7	a)Explain basic programming of Verilog and Define the syntax of Module Representation. b)Explain Data flow and Structural modeling with the help of example Programs	(4+6)M	L2
8	Explain Behavioral modeling with the help of example Program.	10M	L2
9	a)Explain Verilog Timings and Delays in Modelling? b)Describe Hierarchical Module Representation with an Example.	(5+5)M	L2
10	a)Explain Test bench Formation in Verilog.? b)Describe Structure of a Verilog Test bench File and Explain how it Displays Test Results.	10M	L2

 

Unit-2

Q.No	Question	Marks	Cognitive level
1	Explain different Net  data types in verilog?	10M	L2
2	Explain different variable  data types in verilog?	10M	L2
3	Explain Data values and Explain naming a Net or a Variable with the help of verilog code	10M	L2
4	Describe defining Constants, Parameters and Vectors in verilog.	10M	L2
5	Explain Arithmetic Operators and write verilog code for it?	10M	L2
6	Explain different Operators supported by verilog	10M	L2
7	Write verilog code using Concatenation and Replication Operators	10M	L2
8	Explain Application on Data types and Operators.	10M	L2
9	Give FPGA Implementation Details for Vector Operations	10M	L2
10	Give FPGA Implementation Details for Arithmetic Operations	10M	L2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Unit-3 Part-1

Q.No	Question	Marks	Cognitive level
1	a)What is a combinatonal circuit? Explain combinational circuit analysis? b)Explain Combinational Circuit Design?	(5+5)M	L2
2	a)Explain logic function formation between input and output? With the help of an example. b)Explain Gate _level_minimisation?	(7+3)M	L2
3	Describe Boolean algebra and write verilog code for Basic Boolean Identities?	10M	L2
4	Explain combinational circuit  implementation  Implementing Two-Input and three input  Combinational Circuits	10M	L2
5	Explain truth table based implementation ?Explain  Implementing One-Input Combinational Circuits.	10M	L2

 

 

 

Unit-3 Part-2

Q.No	Question	Marks	Cognitive level
1	Explain Register , Memory  and ROM in verilog?	10M	L3
2	Describe Parity Generators and Checkers in verilog?	10M	L2
3	Implement  the Home Alarm System using Basys3Board ?	10M	L3
4	Implement the Digital Safe System using Basys3Board?	10M	L3
5	Implement the Car Park Occupied Slot Counting  System using Basys3Board?	10M	L3

 

 

 

 

 

 

Unit-4

Q.No	Question	Marks	Cognitive level
1	Explain Sequential Circuit Analysis with an example?	10M	L3
2	Explain Sequential Circuit Design with an example?	10M	L3
3	a)Define state table, state diagram and state equations? b)Explain state representation in verilog?	(5+5)M	L2
4	Explain Timings in sequential circuits?	10M	L2
5	Explain Shift Register as a Sequential Circuit and Shift register in verilog.	10M	L2
6	Explain Multiplication and Division using shift registers and write verilog code	10M	L2
7	Explain  Synchronous and Asynchronous Counter  in verilog	10M	L2
8	Explain the concept of frequency division using counters in verilog.	10M	L2
9	Explain  Synchronous and Asynchronous operation  in verilog	10M	L2
10	Explain Counter as a sequential circuit  in verilog	10M	L2

Unit-5

Q.No	Question	Marks	Cognitive level
1	Explain Universal Asynchronous   Receiver/Transmitter(UART) in Verilog.	10M	L3
2	Explain  Serial Peripheral Interface (SPI) in Verilog.	10M	L3
3	Explain  Inter-Integrated Circuit (I2C) in Verilog.	10M	L2
4	Explain  Video Graphics Array (VGA) in Verilog.	10M	L2
5	Explain  Universal Serial Bus (USB) Receiving Module in Verilog.	10M	L2
6	Implement vending machine in verilog	10M	L2
7	Implement digital clock in verilog	10M	L2
8	Explain briefly about Digital table Tennis Game and Car parking  sensor system	10M	L2
9	Explain briefly about Non touch paper towel dispenser and Obstacle –Avoiding tank	10M	L2
10	Explain briefly about Air freshener Dispenser  and Intelligent washing Machine.	10M	L2

 

Faculty : Ms. S.Spandana  Department: ECE