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ANDHRA LOYOLA INSTITUTE OF ENGINEERING AND TECHNOLOGY VIJAYAWADA-8

ACADEMIC YEAR: 2020-2021

YEAR & SEM: I - II                                                                   BRANCH: CSE/IT

SUBJECT NAME: COMPUTER ORGANIZATION

 Cognitive levels

L1– Remember, L2-Understanding, L3- Applying / Analyzing 

Question Bank for unit-1

Unit-1

Q.No	Question	Marks	Cognitive level
1	a) What is a self complementing code? Write about reflected codes by giving examples.	10m	L1
2	Explain different methods used to represent negative numbers in binary system.	10m	L2
3	a) For the given Boolean function    F=x y’ z + x’ y’ z +w’ x y + w x’ y + w x y   i. Simplify the function to minimal literals using      Boolean algebra b) Reduce the expression using K-map    ∑m(0,1,4,5,7,9,11,15)+d(10,14)	5m       5m	L2       L2
4	Obtain the complement of the following Boolean expressions. (i) AB+A(B+C)+B’(B+D)           (ii) A+B+A’B’C	10m	L2
5	Encode the decimal numbers using 6, 3, 1,-1 weighted code. Is it a self-complementing code?	10m	L2
6	Perform the subtraction using 1’s complement and 2’s complement methods. (i)11010 – 10011 (ii)11000 – 1011 (iii)111 - 110000	10m	L2
7	A 7 bit Hamming code is received as 1110101.Is there any error? If yes, locate the position of the error bit. Parity checks are created by odd parity.	10m	L2
8	a) Determine the canonical sum-of-products representation of the following functions     i) f(A,B,C) =C+ (A’+B)(A+B’)     ii) f(A,B,C) =A +(A’B’+A’ C)’	10m	L2
9	a) Implement the following function using only NOR gates  F=a. (b+ c.d) + (b. c). b) Implement the following function using only NAND gates G=(a + b).(c. d + e )	5m   5m	L2   L2
10	a) Distinguish between fixed point representation and floating point representation b) Represent (46.5)10 in IEEE 754 floating point representation	4m     6m	L2     L2

 

Question Bank for unit-2

Unit-2

 

Q.No	Question	Marks	Cognitive level
1	What is a Combinational circuit? Write the procedural steps for the design of combinational circuits explain with an example?	10M	L1
2	a) What is flip-flop? How can be used in sequential circuit and explain in detail. b) Draw the logic diagram of SR flip flop and explain its operation.	5m   5m	L1   L1
3	a)Explain 3X8 decoder in detail. b) Design a 4 bit ring counter using D flip-flops and explain its operation with the help of bit pattern.	5m   5m	L2   L2
4	a) Realize the function  using     i) 8:1 MUX      ii) 4:1 MUX b) Give the Excitation table for J-K Flip-flop and List out applications of flipflops.	5m   5m	L2   L1
5	a) Design a full-adder and  half-adders and basic gates	10m	L1
6.	What is flipflop?Explain different types of flipflops	10m	L1
7	a)Explain SR-Latch and D-Latch with their Logic Diagram and truth tables b) Compare asynchronous and synchronous counters.	6m   4m	L1   L1
9	a) Implement full adder b) Give the comparison between synchronous sequential and asynchronous sequential circuits	5m   5m	L2   L1
10	Write the procedural steps for the design of Modulus N Synchronous Counter and Design 2-bit Synchronous up counter	10M	L2

 

Question Bank for unit-3

Unit-3

Q.No	Question	Marks	Cognitive level
1	a) Discuss hardware implementation for signed magnitude for addition and subtraction. b) With a neat Flowchart explain Floating-Point Addition and Subtraction.	5m   5m	L1   L1
2	a) Classify the instructions of typical computers. Explain about shift Instructions. .	10m	L1
3	a) Classify the instructions of typical computers. Explain about Logic Instructions. b) Using flowchart discuss the hardware algorithm for addition & subtraction.	5m   5m	L1   L1
4	a) Write an algorithm to add the magnitudes and attach the sign of A to the result, when the signs of A and B are different. b) Write a note on logic instructions.	5m     5m	L1     L1
5	a) Explain about Arithmetic Instructions b) Write a short note on shift instructions.	5m 5m	L1 L1
6	a) Draw the flowchart for Booth’s algorithm for multiplication of signed 2’s complement numbers and explain with an example. b) Dividend A=01110 Divisor B=10001. Explain flowchart for divide operation.	5m     5m	L1     L1